l   清华大学(台湾) 电机工程博士

l   主修: 集成电路设计与测试

l   专长: 集成电路设计与测试、能源搜集芯片设计、自我修复电路芯片设计、高效能运算(High performance Computing, HPC)芯片设计

l   经历:

在台先后担任逢甲大学､清华大学､勤益科技大学之博导、硕导､讲师､副教授､教授;并在勤益科技大学 电子工程系担任集程电路负责人､系主任､副教务长､教学卓越中心主任及校长特助; 台湾考试部门文官学院讲座教授。现为厦门城市职业学院 人工智能学院 教授兼专业领头人。

l   著作:

1.          大学专业教科书三本､国外译着两本

2.          学术论文约八十几篇､技术报告约三十几篇

3.          SCI及EI论文择优如下:

(1).     Chiou-Kou Tung, Shao-Hui Shieh and Ching-Hwa Cheng, “A Regularly Modularized Multiplexer-Based Full Adder for Arithmetic Applications,” An International Journal Applied Mathematics ＆ Information Sciences (AMIS), Vol. 8, No. 3, pp. 1257-1265, May 2014. (SCI, Impact Factor: 0.731)

(2).     Chiou-Kou Tung, Shao-Hui Shieh and Ching-Hwa Cheng, “Low-Power High-Speed Full Adder for Portable Electronic Applications,” Electronics Letters, Vol. 49 , No. 17, pp. 1063 - 1064 , 15th, August, 2013.（SCI, Impact Factor：1.038）

(3).     Min-Ching Chu, Hsin-Chiang You, Jagan Singh Meena, Shao-Hui Shieh, Chyi-Yau Shao, Feng-Chih Chang, Fu-Hsiang Ko, “Facile Electroless Deposition of Zinc Oxide Ultrathin Film for Zinc Acetate Solution-processed Transistors,” International Journal of Electrochemical Science, Vol. 7, pp. 5977 – 5989, July 2012. (SCI, Impact Factor：1.573)

(4).     Yu-Cherng Hung, Shao-Hui Shieh and Chiou-Kou Tung, “A Survey of Low-Voltage Low-Power Techniques and Challenges for CMOS Digital Circuits,” Journal of Circuits, Systems and Computers, Vol. 20, No. 01, pp. 89-105, 2011. (SCI, EI) (Invited Paper)

(5).     Shao-Hui Shieh and Cheng-Wen Wu, “Asymmetric High-Radix Signed-Digit Numbers Systems”, Journal of Information Science and Engineering, Vol. 19, No. 6, pp.1015-1039, Nov. 2003. (SCIE)

(6).     Bin-Hong Lin, Shao-Hui Shieh, and Cheng-Wen Wu, “A Fast Signature Computation Algorithm for LFSR and MISR”, IEEE Trans. on Computer Aided Design, Vol. 19, No. 9, pp. 1031-1040, 2000. (SCI, EI)

(7).     Jin-Hua Hong; Bin-Yan Tsai; Liang-Te Lu; Shao-Hui Shieh, “A Novel Radix-4 Bit-Level Modular Multiplier for Fast RSA Cryptosystem”, Proceedings of the 2004 International Symposium on Circuits and Systems (ISCAS'04), Vol.2, pp.837–840, Vancouver, BC, Canada, 23-26 May 2004. (EI)

(8).     Chiou-Kou Tung, Shao-Hui Shieh, Yu-Cherng Hung, and Ming-Chien Tsai, “High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability”, Proc. of the IEEE 8th Asia Pacific Conference on Circuits and Systems (APCCAS 2006), pp.615-618, Singapore, Dec, 2006. (NSC 94-2215-E-167-001) (EI)

(9).     Shao-Hui Shieh, Chiou-Kou Tung, Yu-Cherng Hung, and Ying-Yi Chu, “Low-Power Full Adder Modules with Driving Capability”, 1st Cross-Strait Seminar on Engineering & Technology Education and Industry-Academy Integration, Changzhou, Jiangsu, Vol. 4, pp.38-41, Dec. 6-8, 2007.

(10). Y.-C. Hung, S.-H. Shieh, C.-K Tung, “A Real-Time Current-Mode CMOS Analog Median Filtering Cell for System-on-Chip Applications,” IEEE Conference on Electron Devices and Solid-State Circuits (EDSSC 2007), pp. 361 – 364, Tainan, Taiwan, 20-22 Dec. 2007. (EI) (Best Paper)

(11). Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, and Guo-Shing Huang, “A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System”, the 10th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS2007), Kraków, Poland, pp.199-202, April 11-13, 2007. (EI)

(12). Shao-Hui Shieh and Chyi-Yau Shao, “ZnO Device by Thermal Coater”, 17th Symp. on Nano  Device Technology (SNDT2010), pp. D-30, 2010. (EI) (Best Paper Candidate)

(13). Shao-Hui Shieh and Bo-Chyuan Su, “Low-Power Ten-Transistor Full Adder Design by Using Three-Transistor XOR/XNOR Gates,” Proc. of 2010 International Conference on High-Speed Circuits Design, pp. 60~ 63, Taichung, Taiwan, Oct. 28-29, 2010. (EI) (ISBN: 978-957-21-7823-2)

(14). Shao-Hui Shieh and Bo-Chyuan Su, “High Performance Adder Design Based on Binary-Signed Digit System,” Proc. of 4th Cross-Strait Technology, Humanity Education and Academy-Industry Cooperation Conference, pp. Elec. 25-1~ 25-12, Taichung, Taiwan, Dec. 2, 2010. (ISBN: 986025547-4)

(15). Shao-Hui Shieh and Wei-Siou Ton, “Berger Code Totally Self-Checking Checker Design for Embedded Adder Cores,” Proc. of 5th Intelligent Living Technology Conference (ILT2010), pp 790-795, Taichung, Taiwan, June 2010. (Best Paper)

(16). Shao-Hui Shieh and Wei-Cheng Chen, “Improved High-Performance Carry-Select Adder,” 4th Conference on Integrated Opto-Mechatronic Technology and Intellectual Property Rights (IOME2010), pp. 180-186, Taipei, Taiwan, May 12, 2010. (EI)(ISBN 978-986-85210-3-2)

(17). Shao-Hui Shieh and Wei-Cheng Chen, “Two-Rail Checker Self-Repair Carry-Select Adder Design,” Conference on Innovative Application of System Prototyping and Circuit Design (CIASPCD2010), pp.143-147, Oct. 2010. (EI) (ISBN 978-986-6212-06-02)

(18). Hsin-Chiang You, Shao-Hui Shieh, Shiang-Jun Zhang, Fu-Hsiang Ko, Hsiung-Min Lin, Shyh-Chang Tsaur, and Chin-Che Lin, “The Effect of X-ray Irradiation on the Novella Type Photoresist,” IEEE International NanoElectronics Conference (INEC2010), Hong Kong, China, Jan. 3-8, 2010. (EI)

(19). Shao-Hui Shieh and Bo-Chyuan Su, “Implementation of High Performance Binary Signed-Digit to Two’s Complement Binary Converter,” Proc. of 6th Intelligent Living Technology Conference, pp. 995-999, Taichung, Taiwan, June 3, 2011. (ISBN: 978-957-21-8031-0) (Best Paper)

(20). Shao-Hui Shieh, “Low Power Self-Checking Two-Rail Code Checker Design”, IEEE 3rd Asia Symposium on Quality Electronic Design 2011 (ASQED 2011), pp. 191-194, Kuala Lumpur, Malaysia, 19-20 July 2011. (EI)

(21). Shao-Hui Shieh, Hsin-Chiang You, and Chyi-Yau Shao, “Fabrication of Sol-Gel-Derived Zinc Oxide Thin-Film Transistor”, 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS 2011), p. 736-739, Kaohsiung, Taiwan, February 20-23, 2011. (EI)

(22). Hsin-Chiang You, Shiang-Jun Zhang, Shao-Hui Shieh, and Chiou-Kou Tung, “Fabricating Zinc Oxide Semiconductor Device of Flexible Substrate by Using the Spin-Coating Method”,    6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems (NEMS 2011), p. 780-783, Kaohsiung, Taiwan, February 20-23, 2011. (EI)

(23). Hsin-Chiang You, Yen-Wei Tu, Yu-Hsien Lin, Shao-Hui Shieh, “The Transistor Characteristics of Zinc Oxide Active Layer with Different Thickness of Zinc Oxide Thin-Film,” 2012 International Symposium on Computer, Consumer and Control (IS3C 2012), pp. 858 – 861, Taichung, 4-6 June 2012. (EI)

(24). Shao-Hui Shieh, Jheng-Huei Li, Chen-Hao Yang, and Ming-Ze Chen, “Lighting Floor Design Based on Piezoelectric and Solar Green Powers,” pp. 21_LTG017 1-6, 2012 Conference on Innovative Electronics Design and Applications (IED 2012), Sun Moon Lake Teachers' Hostel, Yuchi, Taiwan, Dec. 17 2012. (EI)

(25). Shao-Hui Shieh and Chen-Hao Yang, “Solar and Vibration Energy Harvesting System,” The 34th Symposium on Electrical Power Engineering, pp. 2376 – 2379, Nov. 2013. (EI)

(26). Shao-Hui Shieh, Der-Chen Huang and Ying-Yi Chu, “Low Voltage and Low Power 64-bit Hybrid Adder Design Based on Radix-4 Prefix Tree Structure,” IEEE International Symposium on Computer, Consumer and Control (IS3C 2014), pp. 445-448, Taichung city, Taiwan, 10-12 June 2014. (EI)

(27). Shao-Hui Shieh and Jheng-Huei Li, “RF to DC Rectifier Design Based on Charge Pump,” 10th Conference on Intelligent Living Technology (ILT 2015), pp. 643 - 646, June. 2015. (Best Paper)

(28). Kai-Lun Chen, Hao-Ping Chan, Yu-Cherng Hung, Shao-Hui Shieh, “A Smart LED Lighting with Multiple Dimming and Temperature Automatic Protection Capabilities,” IEEE 2016 International Symposium on Computer, Consumer and Control (IS3C), pp. 614 – 617, Xi'an China, 4-6 July 2016. (EI)

(29). Shao-Hui Shieh and Jia-Hong Hung, “Study of Compensation-Based Charge Pump Circuits,” 13th Conference on Intelligent Living Technology (ILT2018), pp. ICD012 1 - ICD012 5, 1 Jun. 2018. (Best Paper)

(30). Ying-Yi Chu, Shao-Hui Shieh, Hai Feng, Hanyong Deng, Miin-Shyue Shiau, and Der-Chen Huang, “A High-Speed Carry-Select Adder with Optimized Block Sizes.” 2021 International Conference on Anti-Counterfeiting, Security and Identification (IEEE-ASID’2021), Oct 29- 31, 2021. (EI)

 

l   学术活动:

1.          主办研讨会五场､协办研讨会二十三场

2.          担任 Intelligent Living Technology Conference (ILT)智慧生活科技研讨会，议程委员、集成电路设计领域主席、主持人 (2006~2024)

3.          担任IEEE International Symposium on Computer, Consumer and Control (IS3C) - Track Chair (Semiconductor), Reviewer, and Session Chair (2012~2022)

4.          担任IEEE 12th International Symposium on Integrated Circuits (ISIC-2009), Singapore, - Special Session (Low-Power Circuits/Systems Design and Its Applications) Organizer

 

l   研究计划:

1.          台湾教育部门VLSI与系统设计教育改进计划(2001/3-2007/12)､前瞻芯片系统设计人才培育先导型计划(2008/3-2011/7)､智能电子国家型计划(2011/8~2016/7)､教学创新先导计划与高等教育深耕计划(2017/8~2020/7)

2.          台湾国科会芯片系统相关实作技术整合推动项目与个人研究计画(2002/8~2015/7)

3.          台湾经济部门产学合作计划半导体学院计划-勤益IC测试人才培训班(2006/3~2010/12)

 

l   其他:

1            创建台湾勤益科大电子工程系「集成电路设计」組與相關实验室，并与台湾半导体研究中心(TSRI)合作，长期培训集成电路设计人才。

2            建立Intel Altera全球大学计划校园联合实验室。

3            承办台湾教育部門「97年度技职校院教学卓越计划暨区域教学资源中心联合成果展」

4            担任国内外期刊审稿：(仅列重要部分)

(1)      IEEE Transactions on Circuits and Systems I: Regular Papers

(2)      IEEE Transactions on Circuits and Systems Ⅱ: Express Briefs

(3)      IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

(4)      IEEE Transactions on Computers

(5)      IEEE Transactions on Very Large Scale Integration Systems

(6)      Journal of the Chinese Institute of Engineers,

(7)      Journal of Information Science and Engineering

 

l   担任国内專家顧問：(仅列重要部分)

1.       厦门市 科技交流合作协会 专家库专家 (2022.04.29~2024.04.28)

2.       厦门市  标准化研究院 专家顾问 (2022.06~2024.06)

3.       台湾地区标准化(厦门)研究中心两岸标准化 专家(2022.08.18-2027.08.17)

4.       厦门市集成电路行业协会专家委员会 集成电路设计领域专家(2022.12 – 2025.12)

5.       台湾智慧生活科技学会 创始会员与常务监事长

6.       厦门市集成电路行业申请奖励补助项目评委(2023~ )

 

l   近期受邀演講: (仅列重要部分)

1.        谢韶徽「集成电路发展之我思」：硬科技、新发展—2022集成电路技术创新论坛暨首届三航翱翔硬科技创新论坛，福建厦门宾馆-富园厅，2022年5月22日。

2.        谢韶徽「台湾半导体研究中心介绍」：“厦门集成电路产业深化产教研融合协同育人座谈会”，厦门大学海韵园行政楼A306，2023年7月4日(星期二)。